What are the foundations of designing and implementing low-level software that interacts with real-world systems?
(By low level I mean software running on bare-metal or a small footprint RTOS, on a small processor core — Not embedded Linux on a Cortex-A class MCU)
This is the last post in the series.
Is it possible to write pure modern C++ bare-metal firmware from the ground up for RISC-V?
The answer is a qualified yes.
This is the seventh post in a series. This post is about RISC-V interrupt handling in C++.
What are the basics of interrupt handing in RISC-V? Can we utilize modern C++ to simplify interrupt handling?
The RISC-V ISA is not specialized for embedded applications (when compared to an ISA such…
This is the sixth post in a series, about the RISC-V machine mode timer and timing keeping using the C++
How does RISC-V keep time? How can we perform a periodic task with no operating system?
This is the fifth post in a series.
What are system registers in RISC-V? How can we access them with modern C++?
System registers require special instructions to access, so unlike memory-mapped registers (MMIO) we can’t just cast a pointer to memory to get access them in C++.
In the last post, we set up the development environment. This post is about how the RISC-V core executes our program.
How do we go from reset to entering the
main() function in C++ in RISC-V? …
Following on from Part 2, how do we compile this project and run it?
For this series of posts, my platform is a SiFive HiFive1 Rev B development board. It’s equipped with a 320MHz RV32IMAC (FE310 core). …
As described in Part 1, a simple C++ application to blink an LED, what does this look like with no operating system?
Let’s look at the program flow, and the C++ and RISC-V…
What does it look like to program with no operating system? Can we have direct access to hardware using a high-level language like C++? How does RISC-V work at the most stripped-back bare metal level?
This is a series of posts where I’d like to combine those topics for embedded…